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» Not a Number of Floating Point Problems
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65
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ISCAS
2006
IEEE
107views Hardware» more  ISCAS 2006»
15 years 4 months ago
A versatile computation module for adaptable multimedia processors
—This paper describes a low cost, low power, versatile computation module that can be used as a coarse-grain building block in multimedia processors. The module, which has a data...
Yunan Xiang, R. Pettibon, Martin Margala
82
Voted
CIT
2006
Springer
15 years 2 months ago
Design of Novel Reversible Carry Look-Ahead BCD Subtractor
IEEE 754r is the ongoing revision to the IEEE 754 floating point standard. A major enhancement to the standard is the addition of decimal format, thus the design of BCD arithmetic...
Himanshu Thapliyal, Sumedha K. Gupta
FPL
2008
Springer
153views Hardware» more  FPL 2008»
14 years 11 months ago
FPGA acceleration of quasi-Monte Carlo in finance
Today, quasi-Monte Carlo (QMC) methods are widely used in finance to price derivative securities. The QMC approach is popular because for many types of derivatives it yields an es...
Nathan A. Woods, Tom VanCourt
183
Voted
ARITH
2011
IEEE
13 years 10 months ago
Fast Ripple-Carry Adders in Standard-Cell CMOS VLSI
— This paper presents a number of new high-radix ripple-carry adder designs based on Ling’s addition technique and a recently-published expansion thereof. The proposed adders a...
Neil Burgess
79
Voted
PVLDB
2008
123views more  PVLDB 2008»
14 years 9 months ago
Efficient implementation of sorting on multi-core SIMD CPU architecture
Sorting a list of input numbers is one of the most fundamental problems in the field of computer science in general and high-throughput database applications in particular. Althou...
Jatin Chhugani, Anthony D. Nguyen, Victor W. Lee, ...