129 search results - page 10 / 26 » Novel Design Methodology for High-Performance XOR-XNOR Circu... |
84
Voted
DSN
2011
IEEE
13 years 9 months ago
2011
IEEE
—As process technology shrinks devices, circuits experience accelerated wearout. Monitoring wearout will be critical for improving the efficiency of error detection and correctio...
DAC
2005
ACM
15 years 10 months ago
2005
ACM
This paper presents a systematic methodology to create customized structural macromodels for a specific analog circuit. The novel contributions of the method include definition of...
FPGA
2008
ACM
14 years 11 months ago
2008
ACM
Current advances in chip design and manufacturing have allowed IC manufacturing to approach the nanometer range. As the feature size scales down, greater variability is experience...
VLSID
2002
IEEE
15 years 10 months ago
2002
IEEE
Compare CMOS Logic with Pass-Transistor Logic, a question was raised in our mind: "Does any rule exist that contains all good?" This paper reveals novel logic synthesis ...
88
Voted
ASPDAC
2006
ACM
15 years 3 months ago
2006
ACM
- One of the critical issues in MTCMOS design is how to estimate a circuit delay quickly. In this paper, we propose a delay modeling and static timing analysis (STA) methodology ta...