129 search results - page 12 / 26 » Novel Design Methodology for High-Performance XOR-XNOR Circu... |
80
Voted
CHES
2006
Springer
15 years 1 months ago
2006
Springer
Balanced dynamic dual-rail gates and asynchronous circuits have been shown, if implemented correctly, to have natural and efficient resistance to side-channel attacks. Despite thei...
ARC
2007
Springer
15 years 3 months ago
2007
Springer
Abstract. The novel design of high-speed and low-energy FPGA routing architecture consisting of appropriate wire segments and multiple Switch Boxes is introduced. For that purpose,...
DAC
1999
ACM
15 years 10 months ago
1999
ACM
- A closed form expression for the propagation delay of a CMOS gate driving a distributed RLC line is introduced that is within 5% of dynamic circuit simulations for a wide range o...
APCSAC
2003
IEEE
15 years 2 months ago
2003
IEEE
This paper discusses the use of signed-digit representations in the implementation of fast and efficient residue-arithmetic units. Improvements to existing signed-digit modulo adde...
80
Voted
GLVLSI
2009
IEEE
15 years 4 months ago
2009
IEEE
Resource based optimization for high performance integrated circuits is presented. The methodology is applied to simultaneous shield and repeater insertion, resulting in minimum c...