: Due to exponential increase in subthreshold leakage with technology scaling and temperature increase, leakage power is becoming a major fraction of total power in the active mode...
- Designing a power-gating structure with high performance in the active mode and low leakage and short wakeup time during standby mode is an important and challenging task. This p...
This paper reports a novel simulation methodology for analysis and prediction of substrate noise impact on analog / RF circuits taking into account the role of the parasitic resis...
Charlotte Soens, Geert Van der Plas, Piet Wambacq,...
This paper describes a high performance CMOS differential input front-end, designed for optical wireless communications. The front-end achieves a 50 MHz bandwidth and a 400 K tran...
E. de Vasconcelos, J. L. Cura, Rui L. Aguiar, Dini...
The use of CMOS nanometer technologies at 65 nm and below will pose serious challenges on the design of mixed-signal integrated systems in the very near future. Rising design comp...