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» Novel architecture for loop acceleration: a case study
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CASES
2001
ACM
15 years 1 months ago
The very portable optimizer for digital signal processors
Although retargetability has been a major design concern for many compilers, retargetability is a vitally important issue for Digital Signal Processors(DSPs) because the architect...
Sungjoon Jung, Yunheung Paek
BTW
2005
Springer
113views Database» more  BTW 2005»
15 years 3 months ago
A Learning Optimizer for a Federated Database Management System
: Optimizers in modern DBMSs utilize a cost model to choose an efficient query execution plan (QEP) among all possible ones for a given query. The accuracy of the cost estimates de...
Stephan Ewen, Michael Ortega-Binderberger, Volker ...
ECRTS
2010
IEEE
14 years 10 months ago
Making DRAM Refresh Predictable
Embedded control systems with hard real-time constraints require that deadlines are met at all times or the system may malfunction with potentially catastrophic consequences. Sched...
Balasubramanya Bhat, Frank Mueller
FORMATS
2007
Springer
15 years 1 months ago
Combining Formal Verification with Observed System Execution Behavior to Tune System Parameters
Resource limited DRE (Distributed Real-time Embedded) systems can benefit greatly from dynamic adaptation of system parameters. We propose a novel approach that employs iterative t...
Minyoung Kim, Mark-Oliver Stehr, Carolyn L. Talcot...
CASES
2008
ACM
14 years 11 months ago
Multiple sleep mode leakage control for cache peripheral circuits in embedded processors
This paper proposes a combination of circuit and architectural techniques to maximize leakage power reduction in embedded processor on-chip caches. It targets cache peripheral cir...
Houman Homayoun, Mohammad A. Makhzan, Alexander V....