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CGO
2003
IEEE
15 years 11 months ago
Addressing Mode Selection
Many processor architectures provide a set of addressing modes in their address generation units. For example DSPs (digital signal processors) have powerful addressing modes for e...
Erik Eckstein, Bernhard Scholz
CODES
2003
IEEE
15 years 11 months ago
A fast parallel reed-solomon decoder on a reconfigurable architecture
This paper presents a software implementation of a very fast parallel Reed-Solomon decoder on the second generation of MorphoSys reconfigurable computation platform, which is targ...
Arezou Koohi, Nader Bagherzadeh, Chengzi Pan
MICRO
2003
IEEE
152views Hardware» more  MICRO 2003»
15 years 11 months ago
A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor
Single-event upsets from particle strikes have become a key challenge in microprocessor design. Techniques to deal with these transient faults exist, but come at a cost. Designers...
Shubhendu S. Mukherjee, Christopher T. Weaver, Joe...
P2P
2003
IEEE
115views Communications» more  P2P 2003»
15 years 11 months ago
NanoPeer Networks and P2P Worlds
We present the NanoPeers architecture paradigm, a peer-to-peer network of lightweight devices, lacking all or most of the capabilities of their computer-world counterparts. We ide...
Peter Triantafillou, Nikos Ntarmos, Sotiris E. Nik...
AUSAI
2003
Springer
15 years 11 months ago
Towards Automated Creation of Image Interpretation Systems
Abstract. Automated image interpretation is an important task in numerous applications ranging from security systems to natural resource inventorization based on remote-sensing. Re...
Ilya Levner, Vadim Bulitko, Lihong Li, Greg Lee, R...