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» On Analysis of Design Component Contracts: A Case Study
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DSD
2006
IEEE
72views Hardware» more  DSD 2006»
15 years 7 months ago
A Monitoring-Aware Network-on-Chip Design Flow
Networks-on-chip (NoC) are a scalable interconnect solution for systems on chip and are rapidly becoming reality. Monitoring is a key enabler for debugging or performance analysis...
Calin Ciordas, Andreas Hansson, Kees Goossens, Twa...
CEC
2007
IEEE
15 years 8 months ago
Design and construction of organic computing systems
Abstract— The next generation of embedded computing systems will have to meet new challenges. The systems are expected to act mainly autonomously, to dynamically adapt to changin...
Hella Seebach, Frank Ortmeier, Wolfgang Reif
DATE
2010
IEEE
139views Hardware» more  DATE 2010»
15 years 6 months ago
Pareto efficient design for reconfigurable streaming applications on CPU/FPGAs
We present a Pareto efficient design method for multi-dimensional optimization of run-time reconfigurable streaming applications on CPU/FPGA platforms, which automatically allocate...
Jun Zhu, Ingo Sander, Axel Jantsch
96
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ASYNC
1997
IEEE
66views Hardware» more  ASYNC 1997»
15 years 5 months ago
Speculative Completion for the Design of High-Performance Asynchronous Dynamic Adders
This paper presents an in-depth case study in highperformance asynchronous adder design. A recent method, called “speculative completion”, is used. This method uses single-rai...
Steven M. Nowick, Kenneth Y. Yun, Ayoob E. Dooply,...
FDL
2006
IEEE
15 years 7 months ago
Reusing Real-Time Systems Design Experience
To ensure correctness and performance of real-time embedded systems, early evaluation of properties is needed. Based on design experience for real-time systems and using the conce...
Oana Florescu, Jeroen Voeten, Marcel Verhoef, Henk...