Sciweavers

362 search results - page 33 / 73
» On Bounded-Weight Error-Correcting Codes
Sort
View
WCNC
2008
IEEE
15 years 3 months ago
Genetic Algorithm Aided Design of Near-Capacity Irregular Variable Length Codes
— In this paper we demonstrate that our ability to match the EXtrinsic Information Transfer (EXIT) function of an Irregular Variable Length Code (IrVLC) to that of a seriallyconc...
Robert G. Maunder, Lajos Hanzo
DAC
2009
ACM
15 years 10 months ago
Energy-aware error control coding for Flash memories
The use of Flash memories in portable embedded systems is ever increasing. This is because of the multi-level storage capability that makes them excellent candidates for high dens...
Veera Papirla, Chaitali Chakrabarti
DFT
2009
IEEE
175views VLSI» more  DFT 2009»
15 years 4 months ago
Using RRNS Codes for Cluster Faults Tolerance in Hybrid Memories
Hybrid CMOS/non-CMOS memories, in short hybrid memories, have been lauded as future ultra-capacity data memories. Nonetheless, such memories are going to suffer from high degree o...
Nor Zaidi Haron, Said Hamdioui
VLSID
2005
IEEE
124views VLSI» more  VLSID 2005»
15 years 3 months ago
Design of a Reversible Binary Coded Decimal Adder by Using Reversible 4-Bit Parallel Adder
In this paper, we have proposed a design technique for the reversible circuit of Binary Coded Decimal (BCD) adder. The proposed circuit has the ability to add two 4bits binary var...
Hafiz Md. Hasan Babu, Ahsan Raja Chowdhury
ICASSP
2011
IEEE
14 years 1 months ago
Application control for fast adaptive error resilient H.264/AVC streaming over IP wireless networks
Following the joint source and channel coding paradigm, we propose in this article an application controlling strategy to allow fast adaptation of multimedia transmission to the i...
Catherine Lamy-Bergot, Benjamin Gadat