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» On Bounded-Weight Error-Correcting Codes
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ISCC
2000
IEEE
15 years 1 months ago
Light Weight Security for Parallel Access to Multiple Mirror Sites
Mirror sites approach has been proposed recently for reducing the access delay and providing load balancing in network servers. In the mirror site approach a file, such as a multi...
Bülent Yener
DFT
1999
IEEE
114views VLSI» more  DFT 1999»
15 years 1 months ago
Yield Enhancement Considerations for a Single-Chip Multiprocessor System with Embedded DRAM
A programmable single-chip multiprocessor system for video coding has been developed. The system is implemented in a high-performance 0.25 m logic/embedded DRAM process. It integr...
Markus Rudack, Dirk Niggemeyer
ASPDAC
2007
ACM
116views Hardware» more  ASPDAC 2007»
15 years 1 months ago
VLSI Design of Multi Standard Turbo Decoder for 3G and Beyond
Turbo decoding architectures have greater error correcting capability than any other known code. Due to their excellent performance turbo codes have been employed in several trans...
Imran Ahmed, Tughrul Arslan
CORR
2006
Springer
110views Education» more  CORR 2006»
14 years 9 months ago
Reliable Multi-Path Routing Schemes for Real-Time Streaming
In off-line streaming, packet level erasure resilient Forward Error Correction (FEC) codes rely on the unrestricted buffering time at the receiver. In real-time streaming, the ext...
Emin Gabrielyan, Roger D. Hersch
TCS
1998
14 years 9 months ago
Merit Factors and Morse Sequences
Abstract. We show that Turyn’s conjecture, arising from the Theory of Error Correcting Codes, has an equivalent formulation in Dynamical Systems Theory. In particular, Turyn’s ...
T. Downarowicz, Y. Lacroix