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» On Bus Graph Realizability
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ASAP
1997
IEEE
139views Hardware» more  ASAP 1997»
15 years 4 months ago
Buffer size optimization for full-search block matching algorithms
This paper presents how to find optimized buffer size for VLSI architectures of full-search block matching algorithms. Starting from the DG (dependency graph) analysis, we focus i...
Yuan-Hau Yeh, Chen-Yi Lee
VLSID
1994
IEEE
113views VLSI» more  VLSID 1994»
15 years 3 months ago
A Methodology for Architecture Synthesis of Cascaded IIR Filters on TLU FPGAs
In this paper, we propose an architecture synthesis methodolog `to realize cascaded Infinite Impulse Response (IIRJfilter in Table Look Up (TLU) Field Progmmmable Gate A m y s (FP...
G. N. Rathna, S. K. Nandy, K. Parthasarathy
CORR
2010
Springer
71views Education» more  CORR 2010»
14 years 12 months ago
Start-phase control of distributed systems written in Erlang/OTP
This paper presents a realization for the reliable and fast startup of distributed systems written in Erlang. The traditional startup provided by the Erlang/OTP library is sequenti...
Peter Burcsi, Attila Kovács, Antal Tá...
JCT
2006
69views more  JCT 2006»
14 years 11 months ago
The Bergman complex of a matroid and phylogenetic trees
We study the Bergman complex B(M) of a matroid M: a polyhedral complex which arises in algebraic geometry, but which we describe purely combinatorially. We prove that a natural su...
Federico Ardila, Caroline J. Klivans
CVPR
2010
IEEE
15 years 11 hour ago
Image atlas construction via intrinsic averaging on the manifold of images
In this paper, we propose a novel algorithm for computing an atlas from a collection of images. In the literature, atlases have almost always been computed as some types of means ...
Yuchen Xie, Jeffrey Ho, Baba C. Vemuri