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VLSISP
1998
128views more  VLSISP 1998»
14 years 9 months ago
A Low Power DSP Engine for Wireless Communications
This paper describes the architecture and the performance of a new programmable 16-bit Digital Signal Processor (DSP) engine. It is developed specifically for next generation wire...
Ingrid Verbauwhede, Mihran Touriguian
ADHOC
2011
14 years 4 months ago
A QoS-aware routing mechanism for multi-channel multi-interface ad-hoc networks
To accommodate real-time multimedia application while satisfying application QoS requirements in a wireless ad-hoc network, we need QoS control mechanisms. In this paper, we propo...
Shinsuke Kajioka, Naoki Wakamiya, Hiroki Satoh, Mo...
GRID
2008
Springer
14 years 10 months ago
Scheduling on the Grid via multi-state resource availability prediction
To make the most effective application placement decisions on volatile large-scale heterogeneous Grids, schedulers must consider factors such as resource speed, load, and reliabil...
Brent Rood, Michael J. Lewis
87
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PPOPP
2010
ACM
15 years 7 months ago
The LOFAR correlator: implementation and performance analysis
LOFAR is the first of a new generation of radio telescopes. Rather than using expensive dishes, it forms a distributed sensor network that combines the signals from many thousands...
John W. Romein, P. Chris Broekema, Jan David Mol, ...
EUROSYS
2010
ACM
15 years 6 months ago
A Comprehensive Scheduler for Asymmetric Multicore Systems
Symmetric-ISA (instruction set architecture) asymmetricperformance multicore processors were shown to deliver higher performance per watt and area for codes with diverse architect...
Juan Carlos Saez, Manuel Prieto Matias, Alexandra ...