10 search results - page 2 / 2 » On Combining Symmetry Reduction and Symbolic Representation ... |
CAV
2000
Springer
13 years 9 months ago
2000
Springer
In this paper we show how to do symbolic model checking using Boolean Expression Diagrams (BEDs), a non-canonical representation for Boolean formulas, instead of Binary Decision Di...
FMCAD
1998
Springer
13 years 10 months ago
1998
Springer
We present a new approach to the verification of hardware systems with data dependencies using temporal logic symbolic model checking. As a benchmark we take Tomasulo's algori...
QEST
2007
IEEE
14 years 15 days ago
2007
IEEE
We give an overview of GRIP, a symmetry reduction tool for the probabilistic model checker PRISM, together with experimental results for a selection of example specifications. 1 ...
FMSD
2002
13 years 6 months ago
2002
Combining verification methods developed separately for software and hardware is motivated by the industry's need for a technology that would make formal verification of reali...
CL
2000
Springer
13 years 9 months ago
2000
Springer
Boolean circuits offer a natural, structured, and compact representation of Boolean functions for many application domains. In this paper a tableau method for solving satisfiabilit...