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110
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HPCA
2004
IEEE
16 years 1 months ago
Exploiting Prediction to Reduce Power on Buses
We investigate coding techniques to reduce the energy consumed by on-chip buses in a microprocessor. We explore several simple coding schemes and simulate them using a modified Si...
Victor Wen, Mark Whitney, Yatish Patel, John Kubia...
122
Voted
WCAE
2006
ACM
15 years 6 months ago
PSATSim: an interactive graphical superscalar architecture simulator for power and performance analysis
Two of the most important design issues for modern processors are power and performance. It is important for students in computer organization classes to understand the tradeoff b...
Clint W. Smullen, Tarek M. Taha
97
Voted
IPPS
2002
IEEE
15 years 5 months ago
Architecture of the Entropia Distributed Computing System
Distributed Computing, the exploitation of idle cycles on pervasive desktop PC systems offers the opportunity to increase the available computing power by orders of magnitude (10x...
Andrew A. Chien
104
Voted
ISPD
2006
ACM
126views Hardware» more  ISPD 2006»
15 years 6 months ago
Noise driven in-package decoupling capacitor optimization for power integrity
The existing decoupling capacitance optimization approaches meet constraints on input impedance for package. In this paper, we show that using impedance as constraints leads to la...
Jun Chen, Lei He
106
Voted
ASPDAC
2007
ACM
87views Hardware» more  ASPDAC 2007»
15 years 4 months ago
An Embedded Low Power/Cost 16-Bit Data/Instruction Microprocessor Compatible with ARM7 Software Tools
- A 16-bit THUMB instruction set microprocessor is proposed for low cost/power in short-precision computing. It achieves 40% gate count, 51% power consumption and 160% clock freque...
Fu-Ching Yang, Ing-Jer Huang