7195 search results - page 1297 / 1439 » On Computing Power |
112
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HPCA
2006
IEEE
16 years 4 months ago
2006
IEEE
Measurements of an off-the-shelf DRAM chip confirm that different cells retain information for different amounts of time. This result extends to DRAM rows, or pages (retention tim...
139
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HPCA
2006
IEEE
16 years 4 months ago
2006
IEEE
With reducing feature size, increasing chip capacity, and increasing clock speed, microprocessors are becoming increasingly susceptible to transient (soft) errors. Redundant multi...
135
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HPCA
2004
IEEE
16 years 4 months ago
2004
IEEE
Modern out-of-order processors tolerate long latency memory operations by supporting a large number of inflight instructions. This is particularly useful in numerical applications...
153
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CHI
2004
ACM
16 years 4 months ago
2004
ACM
Master Usability Scaling (MUS) is a measurement method for developing a universal usability continuum based on magnitude estimation and master scaling. The universal usability con...
251
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POPL
2007
ACM
16 years 4 months ago
2007
ACM
In this paper, we propose a new algorithm for proving the validity or invalidity of a pre/postcondition pair for a program. The algorithm is motivated by the success of the algori...