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DAC
2007
ACM
16 years 4 months ago
Fine-Grained Sleep Transistor Sizing Algorithm for Leakage Power Minimization
Power gating is one of the most effective ways to reduce leakage power. In this paper, we introduce a new relationship among Maximum Instantaneous Current, IR drops and sleep tran...
De-Shiuan Chiou, Da-Cheng Juan, Yu-Ting Chen, Shih...
DAC
1998
ACM
16 years 4 months ago
Policy Optimization for Dynamic Power Management
Dynamic power management schemes (also called policies) can be used to control the power consumption levels of electronic systems, by setting their components in different states,...
Giuseppe A. Paleologo, Luca Benini, Alessandro Bog...
DAC
2002
ACM
16 years 4 months ago
Petri net modeling of gate and interconnect delays for power estimation
In this paper, a new type of Petri net called Hierarchical Colored Hardware Petri net, to model real-delay switching activity for power estimation is proposed. The logic circuit i...
Ashok K. Murugavel, N. Ranganathan
MSWIM
2009
ACM
15 years 10 months ago
On power and energy trends of IEEE 802.11n PHY
The main contribution of this work is to decipher the power and energy characteristics of IEEE 802.11 PHY. In this work, we implement an IEEE 802.11n receiver and transmitter benc...
Balaji V. Iyer, Thomas M. Conte
DFT
2002
IEEE
103views VLSI» more  DFT 2002»
15 years 8 months ago
Input Ordering in Concurrent Checkers to Reduce Power Consumption
A novel approach for reducing power consumption in checkers used for concurrent error detection is presented. Spatial correlations between the outputs of the circuit that drives t...
Kartik Mohanram, Nur A. Touba