Sciweavers

7195 search results - page 209 / 1439
» On Computing Power
Sort
View
ICCAD
2003
IEEE
194views Hardware» more  ICCAD 2003»
16 years 5 days ago
On the Interaction Between Power-Aware FPGA CAD Algorithms
As Field-Programmable Gate Array (FPGA) power consumption continues to increase, lower power FPGA circuitry, architectures, and Computer-Aided Design (CAD) tools need to be develo...
Julien Lamoureux, Steven J. E. Wilton
109
Voted
EJWCN
2010
122views more  EJWCN 2010»
14 years 10 months ago
Using Model Checking for Analyzing Distributed Power Control Problems
Model checking (MC) is a formal verification technique which has known and still knows a resounding success in the computer science community. Realizing that the distributed power...
Thomas Brihaye, Marc Jungers, Samson Lasaulce, Nic...
JEC
2006
71views more  JEC 2006»
15 years 3 months ago
Destructive-read in embedded DRAM, impact on power consumption
This paper explores power consumption for destructive-read embedded DRAM. Destructive-read DRAM is based on conventional DRAM design, but with sense amplifiers optimized for lower ...
Haakon Dybdahl, Per Gunnar Kjeldsberg, Marius Gran...
GLOBECOM
2008
IEEE
15 years 3 months ago
Power Efficient Throughput Maximization in Multi-Hop Wireless Networks
Abstract-- We study the problem of total throughput maximization in arbitrary multi-hop wireless networks, with constraints on the total power usage (denoted by PETM), when nodes h...
Deepti Chafekar, V. S. Anil Kumar, Madhav V. Marat...
ASYNC
2005
IEEE
174views Hardware» more  ASYNC 2005»
15 years 9 months ago
Delay Insensitive Encoding and Power Analysis: A Balancing Act
Unprotected cryptographic hardware is vulnerable to a side-channel attack known as Differential Power Analysis (DPA). This attack exploits data-dependent power consumption of a co...
Konrad J. Kulikowski, Ming Su, Alexander B. Smirno...