As Field-Programmable Gate Array (FPGA) power consumption continues to increase, lower power FPGA circuitry, architectures, and Computer-Aided Design (CAD) tools need to be develo...
Model checking (MC) is a formal verification technique which has known and still knows a resounding success in the computer science community. Realizing that the distributed power...
Thomas Brihaye, Marc Jungers, Samson Lasaulce, Nic...
This paper explores power consumption for destructive-read embedded DRAM. Destructive-read DRAM is based on conventional DRAM design, but with sense amplifiers optimized for lower ...
Haakon Dybdahl, Per Gunnar Kjeldsberg, Marius Gran...
Abstract-- We study the problem of total throughput maximization in arbitrary multi-hop wireless networks, with constraints on the total power usage (denoted by PETM), when nodes h...
Deepti Chafekar, V. S. Anil Kumar, Madhav V. Marat...
Unprotected cryptographic hardware is vulnerable to a side-channel attack known as Differential Power Analysis (DPA). This attack exploits data-dependent power consumption of a co...
Konrad J. Kulikowski, Ming Su, Alexander B. Smirno...