87 search results - page 7 / 18 » On Discretization of Delays in Timed Automata and Digital Ci... |
ICCD
2004
IEEE
15 years 6 months ago
2004
IEEE
Deterministic gate delay models have been widely used to find the transition probabilities at the nodes of a circuit for calculating the power dissipation. However, with progress...
DAC
2006
ACM
15 years 10 months ago
2006
ACM
Three-dimensional integrated circuits (3DICs) have the potential to reduce interconnect lengths and improve digital system performance. However, heat removal is more difficult in ...
ICCAD
2006
IEEE
15 years 6 months ago
2006
IEEE
— Negative Bias Temperature Instability (NBTI) in PMOS transistors has become a significant reliability concern in present day digital circuit design. With continued scaling, th...
DATE
1999
IEEE
15 years 1 months ago
1999
IEEE
In this paper, we consider the problem of maximizing the battery life (or duration of service) in battery-powered CMOS circuits. We first show that the battery efficiency (or utili...
ATS
2000
IEEE
15 years 1 months ago
2000
IEEE
At very high frequencies, the major potential of asynchronous circuits is absence of clock skew and, through that, better exploitation of relative timing relations. This paper pre...