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» On Effectiveness of Application-Layer Coding
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CODES
2004
IEEE
15 years 9 months ago
Facilitating reuse in hardware models with enhanced type inference
High-level hardware modeling is an essential, yet time-consuming, part of system design. However, effective component-based reuse in hardware modeling languages can reduce model c...
Manish Vachharajani, Neil Vachharajani, Sharad Mal...
SIGSOFT
2003
ACM
16 years 6 months ago
ARCHER: using symbolic, path-sensitive analysis to detect memory access errors
Memory corruption errors lead to non-deterministic, elusive crashes. This paper describes ARCHER (ARray CHeckER) a static, effective memory access checker. ARCHER uses path-sensit...
Yichen Xie, Andy Chou, Dawson R. Engler
ASPLOS
2010
ACM
16 years 17 days ago
A real system evaluation of hardware atomicity for software speculation
In this paper we evaluate the atomic region compiler abstraction by incorporating it into a commercial system. We find that atomic regions are simple and intuitive to integrate i...
Naveen Neelakantam, David R. Ditzel, Craig B. Zill...
MICRO
2007
IEEE
168views Hardware» more  MICRO 2007»
16 years 10 days ago
Global Multi-Threaded Instruction Scheduling
Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...
Guilherme Ottoni, David I. August
PLDI
2010
ACM
15 years 11 months ago
Mint: Java multi-stage programming using weak separability
Multi-stage programming (MSP) provides a disciplined approach to run-time code generation. In the purely functional setting, it has been shown how MSP can be used to reduce the ov...
Edwin Westbrook, Mathias Ricken, Jun Inoue, Yilong...