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» On Euclidean Embeddings and Bandwidth Minimization
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ECRTS
2010
IEEE
15 years 24 days ago
Partitioning Parallel Applications on Multiprocessor Reservations
A full exploitation of the computational power available in a multi-core platform requires the software to be specified in terms of parallel execution flows. At the same time, mode...
Giorgio C. Buttazzo, Enrico Bini, Yifan Wu
ARVLSI
1997
IEEE
151views VLSI» more  ARVLSI 1997»
15 years 3 months ago
The Hierarchical Multi-Bank DRAM: A High-Performance Architecture for Memory Integrated with Processors
A microprocessor integrated with DRAM on the same die has the potential to improve system performance by reducing the memory latency and improving the memory bandwidth. However, a...
Tadaaki Yamauchi, Lance Hammond, Kunle Olukotun
COMGEO
2004
ACM
14 years 11 months ago
A multi-dimensional approach to force-directed layouts of large graphs
We present a novel hierarchical force-directed method for drawing large graphs. Given a graph G = (V,E), the algorithm produces an embedding for G in an Euclidean space E of any d...
Pawel Gajer, Michael T. Goodrich, Stephen G. Kobou...
EMSOFT
2004
Springer
15 years 5 months ago
Using resource reservation techniques for power-aware scheduling
Minimizing energy consumption is an important issue in the design of real-time embedded systems. As many embedded systems are powered by rechargeable batteries, the goal is to ext...
Claudio Scordino, Giuseppe Lipari
ESTIMEDIA
2009
Springer
14 years 9 months ago
Inter-kernel data reuse and pipelining on chip-multiprocessors for multimedia applications
The increasing demand for low power and high performance multimedia embedded systems has motivated the need for effective solutions to satisfy application bandwidth and latency req...
Luis Angel D. Bathen, Yongjin Ahn, Nikil D. Dutt, ...