Software Engineers frequently need to locate and understand the code that implements a specific user feature of a large system. This paper reports on a study by Motorola Inc. and ...
Michael Jiang, Michael Groble, Sharon Simmons, Den...
As chip multiprocessors (CMPs) become increasingly mainstream, architects have likewise become more interested in how best to share a cache hierarchy among multiple simultaneous t...
Lisa R. Hsu, Steven K. Reinhardt, Ravishankar R. I...
—This paper presents an Improved Snake Model (ISM) effective for performing fast image segmentation. The work takes advantage of two well-known snake models of Balloon [1] and GG...
As the desire of scientists to perform ever larger computations drives the size of today’s high performance computers from hundreds, to thousands, and even tens of thousands of ...
Modern network processors support high levels of parallelism in packet processing by supporting multiple threads that execute on a micro-engine. Threads switch context upon encoun...
R. Collins, Fernando Alegre, Xiaotong Zhuang, Sant...