216 search results - page 42 / 44 » On High-Bandwidth Data Cache Design for Multi-Issue Processo... |
113
Voted
HPCA
2003
IEEE
16 years 1 months ago
2003
IEEE
Java-based middleware, and application servers in particular, are rapidly gaining importance as a new class of workload for commercial multiprocessor servers. SPEC has recognized ...
119
Voted
ISPASS
2005
IEEE
15 years 6 months ago
2005
IEEE
Performance evaluation using only a subset of programs from a benchmark suite is commonplace in computer architecture research. This is especially true during early design space e...
115
Voted
ISCA
2010
IEEE
15 years 3 months ago
2010
IEEE
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...
101
Voted
ICS
2004
Tsinghua U.
15 years 6 months ago
2004
Tsinghua U.
In contemporary out-of-order superscalar design, high IPC is mainly achieved by exposing high instruction level parallelism (ILP). Scaling issue window size can certainly provide ...
150
Voted
ISPASS
2009
IEEE
15 years 8 months ago
2009
IEEE
Modern Graphic Processing Units (GPUs) provide sufficiently flexible programming models that understanding their performance can provide insight in designing tomorrow’s manyco...