Requirements engineering ranks as one of the most difficult and error-prone phases in the life cycle of devices such as mobile telephones. It is of critical importance because of ...
The power dissipated by system-level buses is the largest contribution to the global power of complex VLSI circuits. Therefore, the minimization of the switching activity at the I...
Luca Benini, Giovanni De Micheli, Donatella Sciuto...
Abstract. There is much interest in using the Unified Modeling Language (UML) for architectural description – those techniques by which architects sketch, capture, model, docume...
- Task preemption is a critical enabling mechanism in multi-task VLSI systems. On preemption, data in the register les must be preserved in order for the task to be resumed. This e...
We consider a shared store based on distributed shared memory (DSM), supporting persistence by reachability (PBR), a very simple data sharing model for a distributed system. This ...