921 search results - page 102 / 185 » On Interleaving in Timed Automata |
ASYNC
2003
IEEE
15 years 5 months ago
2003
IEEE
We present the design of a high performance on-chip pipelined asynchronous DRAM suitable for use in a microprocessor cache. Although traditional DRAM structures suffer from long a...
ENTCS
2002
14 years 11 months ago
2002
We present a new approach to the modelling of time constrained systems. It is based on untimed high-level Petri nets using the concept of causal time. With this concept, the progr...
TASE
2009
IEEE
15 years 6 months ago
2009
IEEE
Interrupts are important aspects of real-time embedded systems to handle events in time. When there exist nested interrupts in a real-time system, and an urgent interrupt is allow...
DATE
2008
IEEE
15 years 6 months ago
2008
IEEE
This paper presents a game-theoretic approach to the testing of uncontrollable real-time systems. By modelling the systems with Timed I/O Game Automata and specifying the test pur...
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CAV
2003
Springer
15 years 5 months ago
2003
Springer
We consider the problem of synthesizing controllers for timed systems modeled using timed automata. The point of departure from earlier work is that we consider controllers that ha...