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» On Interleaving in Timed Automata
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ACSD
2010
IEEE
251views Hardware» more  ACSD 2010»
14 years 10 months ago
Modular Interpretation of Heterogeneous Modeling Diagrams into Synchronous Equations Using Static Single Assignment
Abstract--The ANR project SPaCIFY develops a domainspecific programming environment, Synoptic, to engineer embedded software for space applications. Synoptic is an Eclipse-based mo...
Jean-Pierre Talpin, Julien Ouy, Thierry Gautier, L...
CORR
2011
Springer
175views Education» more  CORR 2011»
14 years 6 months ago
Finitary languages
Abstract The class of ω-regular languages provide a robust specification language in verification. Every ω-regular condition can be decomposed into a safety part and a liveness...
Krishnendu Chatterjee, Nathanaël Fijalkow
STOC
1998
ACM
108views Algorithms» more  STOC 1998»
15 years 4 months ago
On Indexed Data Broadcast
We consider the problem of efficient information retrieval in asymmetric communication environments where multiple clients with limited resources retrieve information from a power...
Sanjeev Khanna, Shiyu Zhou
PPOPP
1999
ACM
15 years 4 months ago
Dynamic Instrumentation of Threaded Applications
The use of threads is becoming commonplace in both sequential and parallel programs. This paper describes our design and initial experience with non-trace based performance instru...
Zhichen Xu, Barton P. Miller, Oscar Naim
ICCAD
2001
IEEE
97views Hardware» more  ICCAD 2001»
15 years 8 months ago
Addressing the Timing Closure Problem by Integrating Logic Optimization and Placement
Timing closure problems occur when timing estimates computed during logic synthesis do not match with timing estimates computed from the layout of the circuit. In such a situation...
Wilsin Gosti, Sunil P. Khatri, Alberto L. Sangiova...