921 search results - page 127 / 185 » On Interleaving in Timed Automata |
117
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TCS
2008
14 years 11 months ago
2008
This paper studies a novel paradigm for learning formal languages from positive and negative examples which consists of mapping strings to an appropriate highdimensional feature s...
132
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ICC
2011
IEEE
13 years 11 months ago
2011
IEEE
—Regular expression matching has become a critical yet challenging technique in content-aware network processing, such as application identification and deep inspection. To meet ...
ECLIPSE
2006
ACM
15 years 3 months ago
2006
ACM
In this work we present an Eclipse plug-in for the VInTiMe (Verifier of INtegrated TImed ModEls)1 suite of tools that combines high-level expressive power, unassisted propertypres...
145
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VEE
2012
ACM
13 years 7 months ago
2012
ACM
In software for embedded systems, the frequent use of interrupts for timing, sensing, and I/O processing can cause concurrency faults to occur due to interactions between applicat...
ASE
2010
14 years 12 months ago
2010
Recent developments in runtime verification and monitoring show that parametric regular and temporal logic specifications can be efficiently monitored against large programs. Howev...