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» On Interleaving in Timed Automata
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VLSID
1998
IEEE
116views VLSI» more  VLSID 1998»
15 years 1 months ago
Synthesis of Testable RTL Designs
With several commercial tools becoming available, the high-level synthesis of applicationspeci c integrated circuits is nding wide spread acceptance in VLSI industry today. Existi...
C. P. Ravikumar, Sumit Gupta, Akshay Jajoo
76
Voted
ECAI
1998
Springer
15 years 1 months ago
Diagnosis of Active Systems
Abstract: Lazy computation is not new in model-based diagnosis of active systems (and of discreteevent systems in general). Up to a decade ago, diagnosis methods for discrete-event...
Pietro Baroni, Gianfranco Lamperti, Paolo Pogliano...
83
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FCCM
1997
IEEE
103views VLSI» more  FCCM 1997»
15 years 1 months ago
An FPGA architecture for DRAM-based systolic computations
We propose an FPGA chip architecture based on a conventional FPGA logic array core, in which I/O pins are clocked at a much higher rate than that of the logic array that they serv...
Norman Margolus
PPSN
1994
Springer
15 years 1 months ago
Genetic L-System Programming
We present the Genetic L-System Programming (GLP) paradigm for evolutionary creation and development of parallel rewrite systems (Lsystems, Lindenmayer-systems) which provide a com...
Christian Jacob
ANCS
2007
ACM
15 years 1 months ago
An improved algorithm to accelerate regular expression evaluation
Modern network intrusion detection systems need to perform regular expression matching at line rate in order to detect the occurrence of critical patterns in packet payloads. Whil...
Michela Becchi, Patrick Crowley