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» On LR(k)-Parsers of Polynomial Size
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COCO
1997
Springer
144views Algorithms» more  COCO 1997»
15 years 1 months ago
Polynomial Vicinity Circuits and Nonlinear Lower Bounds
We study families of Boolean circuits with the property that the number of gates at distance t fanning into or out of any given gate in a circuit is bounded above by a polynomial ...
Kenneth W. Regan
DAGSTUHL
2006
14 years 11 months ago
Approximability of Minimum AND-Circuits
Given a set of monomials, the Minimum AND-Circuit problem asks for a circuit that computes these monomials using AND-gates of fan-in two and being of minimum size. We prove that t...
Jan Arpe, Bodo Manthey
COCO
2009
Springer
96views Algorithms» more  COCO 2009»
15 years 4 months ago
Reconstruction of Generalized Depth-3 Arithmetic Circuits with Bounded Top Fan-in
In this paper we give reconstruction algorithms for depth-3 arithmetic circuits with k multiplication gates (also known as ΣΠΣ(k) circuits), where k = O(1). Namely, we give an ...
Zohar Shay Karnin, Amir Shpilka
FCCM
2004
IEEE
89views VLSI» more  FCCM 2004»
15 years 1 months ago
Word-Length Optimization of Folded Polynomial Evaluation
ended abstract presents further results from the word-length optimization system Right-Size described at FCCM 2003. The system is used to quantify the compiletime specialization s...
George A. Constantinides, Abunaser Miah, Nalin Sid...
JCT
2000
103views more  JCT 2000»
14 years 9 months ago
A Combinatorial Algorithm Minimizing Submodular Functions in Strongly Polynomial Time
We give a strongly polynomial-time algorithm minimizing a submodular function f given by a value-giving oracle. The algorithm does not use the ellipsoid method or any other linear ...
Alexander Schrijver