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» On Model Checking Infinite-State Systems
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FOCS
1989
IEEE
15 years 5 months ago
A Really Temporal Logic
We introduce a temporal logic for the speci cation of real-time systems. Our logic, TPTL, employs a novel quanti er construct for referencing time: the freeze quanti er binds a var...
Rajeev Alur, Thomas A. Henzinger
MICRO
2008
IEEE
137views Hardware» more  MICRO 2008»
15 years 1 months ago
Verification of chip multiprocessor memory systems using a relaxed scoreboard
Verification of chip multiprocessor memory systems remains challenging. While formal methods have been used to validate protocols, simulation is still the dominant method used to ...
Ofer Shacham, Megan Wachs, Alex Solomatnikov, Amin...
ADAEUROPE
2005
Springer
15 years 7 months ago
Extending Ravenscar with CSP Channels
Abstract. The Ravenscar Profile is a restricted subset of the Ada tasking model, designed to meet the requirements of producing analysable and deterministic code. A central featur...
Diyaa-Addein Atiya, Steve King
DATE
2004
IEEE
129views Hardware» more  DATE 2004»
15 years 5 months ago
On the Design and Verification Methodology of the Look-Aside Interface
In this paper, we present a technique to design and verify the Look-Aside (LA-1) Interface standard used in network processors. Our design flow includes several refinements starti...
Ali Habibi, Asif Iqbal Ahmed, Otmane Aït Moha...
SIAMAM
2008
119views more  SIAMAM 2008»
15 years 1 months ago
The Chapman--Jouguet Closure for the Riemann Problem with Vaporization
This work is devoted to the modelling of phase transition. The thermodynamic model for phase transition chosen is a model with two equations of state, each of them modelling one p...
Vincent Perrier