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» On Modeling Cross-Talk Faults
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FTCS
1997
100views more  FTCS 1997»
15 years 1 months ago
Discriminating Fault Rate and Persistency to Improve Fault Treatment
In this paper the consolidate identification of faults, distinguished as transient or permanent/intermittent, is approached. Transient faults discrimination has long been performe...
Andrea Bondavalli, Silvano Chiaradonna, Felicita D...
DFT
2005
IEEE
89views VLSI» more  DFT 2005»
15 years 5 months ago
On-Line Identification of Faults in Fault-Tolerant Imagers
Detection of defective pixels that develop on-line is a vital part of fault tolerant schemes for repairing imagers during operation. This paper presents a new algorithm for the id...
Glenn H. Chapman, Israel Koren, Zahava Koren, Jozs...
ISMVL
2007
IEEE
92views Hardware» more  ISMVL 2007»
15 years 6 months ago
Experimental Studies on SAT-Based ATPG for Gate Delay Faults
The clock rate of modern chips is still increasing and at the same time the gate size decreases. As a result, already slight variations during the production process may cause a f...
Stephan Eggersglüß, Daniel Tille, G&oum...
ISSTA
2004
ACM
15 years 5 months ago
Where the bugs are
The ability to predict which files in a large software system are most likely to contain the largest numbers of faults in the next release can be a very valuable asset. To accomp...
Thomas J. Ostrand, Elaine J. Weyuker, Robert M. Be...
DATE
1998
IEEE
106views Hardware» more  DATE 1998»
15 years 4 months ago
March Tests for Word-Oriented Memories
Most memory test algorithms are optimized tests for a particular memory technology and a particular set of fault models, under the assumption that the memory is bit-oriented; i.e....
A. J. van de Goor, Issam B. S. Tlili