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ARVLSI
1997
IEEE
151views VLSI» more  ARVLSI 1997»
15 years 9 months ago
The Hierarchical Multi-Bank DRAM: A High-Performance Architecture for Memory Integrated with Processors
A microprocessor integrated with DRAM on the same die has the potential to improve system performance by reducing the memory latency and improving the memory bandwidth. However, a...
Tadaaki Yamauchi, Lance Hammond, Kunle Olukotun
PODC
2000
ACM
15 years 9 months ago
Efficient atomic broadcast using deterministic merge
We present an approach for merging message streams from producers distributed over a network, using a deterministic algorithm that is independent of any nondeterminism of the syst...
Marcos Kawazoe Aguilera, Robert E. Strom
MICRO
1995
IEEE
97views Hardware» more  MICRO 1995»
15 years 9 months ago
Improving CISC instruction decoding performance using a fill unit
Current superscalar processors, both RISC and CISC, require substantial instruction fetch and decode bandwidth to keep multiple functional units utilized. While CISC instructions ...
Mark Smotherman, Manoj Franklin
194
Voted
SSD
1995
Springer
146views Database» more  SSD 1995»
15 years 9 months ago
Discovery of Spatial Association Rules in Geographic Information Databases
Spatial data mining, i.e., discovery of interesting, implicit knowledge in spatial databases, is an important task for understanding and use of spatial data- and knowledge-bases. I...
Krzysztof Koperski, Jiawei Han
WSC
2008
15 years 8 months ago
Priority mix planning for cycle time-differentiated semiconductor manufacturing services
Semiconductor fabs often offer manufacturing service of multiple priorities in terms of cycle time-based X-factor targets (XFTs) and fab production must be planned accordingly. Th...
Shi-Chung Chang, Shin-Shyu Su, Ke-Ju Chen