- For modern processor designs in nanometer technologies, both block and interconnect pipelining are needed to achieve multi-gigahertz clock frequency, but previous approaches cons...
Yuchun Ma, Zhuoyuan Li, Jason Cong, Xianlong Hong,...
We consider new optimization problems for transceivers with DFE receivers and linear precoders, which also use bit loading at the transmitter. First, we consider the MIMO QoS (qual...
Ching-Chih Weng, Chun-Yang Chen, P. P. Vaidyanatha...
Abstract. We introduce and study the following model for routing uncertain demands through a network. We are given a capacitated multicommodity flow network with a single source an...
Model checking algorithms can report a property as being true for reasons that may be considered vacuous. Current algorithms for detecting vacuity require either checking a quadrat...
Commonly-used memory units enable a processor to load and store multiple registers in one instruction. We showed in 2003 how to extend gcc with a stack-location-allocation (SLA) ph...