553 search results - page 41 / 111 » On Planar Path Transformation |
GLVLSI
2006
IEEE
15 years 6 months ago
2006
IEEE
3-dimensional integrated circuit (3D IC) technology places circuit blocks in the vertical dimension in addition to the conventional horizontal plane. Compared to conventional plan...
104
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CORR
2012
Springer
13 years 7 months ago
2012
Springer
We show how to compute cartograms with worst-case optimal polygonal complexity. Specifically we study rectilinear duals which are side-contact representations of a planar graph G ...
111
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RTCSA
2007
IEEE
15 years 6 months ago
2007
IEEE
Code optimization of the offset assignment generated in embedded systems allows for power and space efficient systems. We propose a new heuristic that uses edge classification to ...
CC
2010
Springer
14 years 10 months ago
2010
Springer
Abstract. We introduce the concept of future values. Using future values it is possible to represent programs in a new control-flow form such that on any control flow path the data...
106
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ISCAS
2007
IEEE
15 years 6 months ago
2007
IEEE
In this paper, an efficient VLSI architecture for a fast computation of the 2-D discrete wavelet transform (DWT) is proposed. The architecture employing a three-stage cascade in p...