2116 search results - page 154 / 424 » On Probabilistic Alternating Simulations |
ITC
2002
IEEE
15 years 3 months ago
2002
IEEE
Conventional fault simulation techniques for FPGAs are very complicated and time consuming. The other alternative, FPGA fault emulation technique, is incomplete, and can be used o...
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ENTCS
2006
14 years 10 months ago
2006
The traditional approach to validate analog circuits is to utilize extensive SPICElevel simulations. The main challenge of this approach is knowing when all important corner cases...
ISCAS
2007
IEEE
15 years 4 months ago
2007
IEEE
— In this study, two chaotic circuits coupled by a time-varying resistor are investigated. We assume that the timevarying resistor is realized by switching a positive and a negat...
CSB
2005
IEEE
15 years 3 months ago
2005
IEEE
Whole genome duplication (WGD) is followed by massive duplicate deletion that reorganizes gene adjacencies. We compare the deletion patterns and adjacency reorganization following...
ICIAR
2004
Springer
15 years 3 months ago
2004
Springer
We present a maximum a posteriori solution to problems of accurate registration of blurred images and recovery of an original undegraded image. Our algorithm has the advantage that...