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ICDCS
2000
IEEE
15 years 2 months ago
Improving Distributed Workload Performance by Sharing both CPU and Memory Resources
We develop and examine job migration policies by considering effective usage of global memory in addition to CPU load sharing in distributed systems. When a node is identified fo...
Xiaodong Zhang, Yanxia Qu, Li Xiao
ISCA
2000
IEEE
103views Hardware» more  ISCA 2000»
15 years 2 months ago
Piranha: a scalable architecture based on single-chip multiprocessing
The microprocessor industry is currently struggling with higher development costs and longer design times that arise from exceedingly complex processors that are pushing the limit...
Luiz André Barroso, Kourosh Gharachorloo, R...
ISCA
2000
IEEE
121views Hardware» more  ISCA 2000»
15 years 2 months ago
Selective, accurate, and timely self-invalidation using last-touch prediction
Communication in cache-coherent distributed shared memory (DSM) often requires invalidating (or writing back) cached copies of a memory block, incurring high overheads. This paper...
An-Chow Lai, Babak Falsafi
SIGMETRICS
2000
ACM
177views Hardware» more  SIGMETRICS 2000»
15 years 2 months ago
A case for end system multicast
— The conventional wisdom has been that IP is the natural protocol layer for implementing multicast related functionality. However, more than a decade after its initial proposal,...
Yang-Hua Chu, Sanjay G. Rao, Hui Zhang
DAC
1999
ACM
15 years 2 months ago
Cycle and Phase Accurate DSP Modeling and Integration for HW/SW Co-Verification
We present our practical experience in the modeling and integration of cycle/phase-accurate instruction set architecture (ISA) models of digital signal processors (DSPs) with othe...
Lisa M. Guerra, Joachim Fitzner, Dipankar Talukdar...