Sciweavers
Explore
Publications
Books
Software
Tutorials
Presentations
Lectures Notes
Datasets
Labs
Conferences
Community
Upcoming
Conferences
Top Ranked Papers
Most Viewed Conferences
Conferences by Acronym
Conferences by Subject
Conferences by Year
Tools
PDF Tools
Image Tools
Text Tools
OCR Tools
Symbol and Emoji Tools
On-screen Keyboard
Latex Math Equation to Image
Smart IPA Phonetic Keyboard
Community
Sciweavers
About
Terms of Use
Privacy Policy
Cookies
51
search results - page 11 / 11
»
On Programmable Memory Built-In Self Test Architectures
Sort
relevance
views
votes
recent
update
View
thumb
title
128
Voted
NOCS
2009
IEEE
108
views
Computer Networks
»
more
NOCS 2009
»
A GALS many-core heterogeneous DSP platform with source-synchronous on-chip interconnection network
15 years 9 months ago
Download
www.ece.ucdavis.edu
This paper presents a many-core heterogeneous computational platform that employs a GALS compatible circuit-switched on-chip network. The platform targets streaming DSP and embedd...
Anh T. Tran, Dean Truong, Bevan M. Baas
claim paper
Read More »
« Prev
« First
page 11 / 11
Last »
Next »