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» On Recognizable Timed Languages
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CODES
2009
IEEE
16 years 28 days ago
Using binary translation in event driven simulation for fast and flexible MPSoC simulation
In this paper, we investigate the use of instruction set simulators (ISS) based on binary translation to accelerate full timed multiprocessor system simulation at transaction leve...
Marius Gligor, Nicolas Fournel, Frédé...
CASES
2006
ACM
16 years 4 days ago
Adapting compilation techniques to enhance the packing of instructions into registers
The architectural design of embedded systems is becoming increasingly idiosyncratic to meet varying constraints regarding energy consumption, code size, and execution time. Tradit...
Stephen Hines, David B. Whalley, Gary S. Tyson
ICALP
2005
Springer
15 years 11 months ago
On the Wake-Up Problem in Radio Networks
Abstract. Radio networks model wireless communication when processing units communicate using one wave frequency. This is captured by the property that multiple messages arriving s...
Bogdan S. Chlebus, Leszek Gasieniec, Dariusz R. Ko...
ICALP
2005
Springer
15 years 11 months ago
New Approaches for Virtual Private Network Design
Virtual Private Network Design is the following NP-hard problem. We are given a communication network, represented as a weighted graph with thresholds on the nodes which represent...
Friedrich Eisenbrand, Fabrizio Grandoni, Gianpaolo...
ICLP
2005
Springer
15 years 11 months ago
Modeling Systems in CLP
We present a methodology for the modeling of complex program behavior in CLP. In the first part we present an informal description about how to represent a system in CLP. At its ...
Joxan Jaffar, Andrew E. Santosa, Razvan Voicu