2452 search results - page 130 / 491 » On Reduction of Lagrange Systems |
117
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
Compared with on-chip routers, the existing commercial tools for off-chip routing have a much lower routability and often result in a large number of unrouted nets for manual rout...
182
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DATE
2006
IEEE
16 years 21 hour ago
2006
IEEE
For CMOS technologies below 65nm, gate oxide direct tunneling current is a major component of the total power dissipation. This paper presents a simulated annealing based algorith...
133
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ISLPED
2003
ACM
15 years 11 months ago
2003
ACM
A significant fraction of the total power in highly synchronous systems is dissipated over clock networks. Hence, low-power clocking schemes would be promising approaches for futu...
169
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GLVLSI
2000
IEEE
15 years 10 months ago
2000
IEEE
Circuit interconnect has become a substantial obstacle in the design of high performance systems. In this paper we explore a new routing paradigm that strikes at the root of the i...
157
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MICRO
1997
IEEE
15 years 10 months ago
1997
IEEE
Cost and power consumption are two of the most important design factors for many embedded systems, particularly consumer devices. Products such as Personal Digital Assistants, pag...