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» On Reduction of Lagrange Systems
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ICTCS
2003
Springer
15 years 11 months ago
A Calculus for Dynamic Linking
We define a calculus for modeling dynamic linking independently of the details of a particular programming environment. The calculus distinguishes at the language level the notion...
Davide Ancona, Sonia Fagorzi, Elena Zucca
ISLPED
1999
ACM
84views Hardware» more  ISLPED 1999»
15 years 10 months ago
An architectural solution for the inductive noise problem due to clock-gating
As we approach Gigascale Integration, chip power consumption is becoming a critical system parameter. Clock-gating idle units provides needed reductions in power consumption. Howe...
Mondira Deb Pant, Pankaj Pant, D. Scott Wills, Viv...
ICCAD
1998
IEEE
96views Hardware» more  ICCAD 1998»
15 years 10 months ago
Test set compaction algorithms for combinational circuits
This paper presents two new algorithms, Redundant Vector Elimination(RVE) and Essential Fault Reduction (EFR), for generating compact test sets for combinational circuits under th...
Ilker Hamzaoglu, Janak H. Patel
144
Voted
DSD
2004
IEEE
111views Hardware» more  DSD 2004»
15 years 9 months ago
Memory Requirement Optimization with Loop Fusion and Loop Shifting
Loop fusion and loop shifting are well recognized loop transformations for memory requirement reduction. Stateof-the-art optimizations with loop fusion and shifting are based on h...
Qubo Hu, Martin Palkovic, Per Gunnar Kjeldsberg
AICCSA
2008
IEEE
254views Hardware» more  AICCSA 2008»
15 years 8 months ago
Integrating software development security activities with agile methodologies
Because of several vulnerabilities in software products and high amount of damage caused by them, software developers are enforced to produce more secure systems. Software grows u...
Hossein Keramati, Seyed-Hassan Mirian-Hosseinabadi