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» On Reduction of Lagrange Systems
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ICCAD
2001
IEEE
127views Hardware» more  ICCAD 2001»
16 years 3 months ago
What is the Limit of Energy Saving by Dynamic Voltage Scaling?
Dynamic voltage scaling (DVS) is a technique that varies the supply voltage and clock frequency based on the computation load to provide desired performance with the minimal amoun...
Gang Qu
GLVLSI
2005
IEEE
104views VLSI» more  GLVLSI 2005»
15 years 11 months ago
Wave-pipelined 2-slot time division multiplexed (WP/2-TDM) routing
The ever-increasing number of transistors on a chip has resulted in very large scale integration (VLSI) systems whose performance and manufacturing costs are driven by on-chip wir...
Ajay Joshi, Jeffrey A. Davis
IFIP
2004
Springer
15 years 11 months ago
Ensuring Termination by Typability
A term terminates if all its reduction sequences are of finite length. We show four type systems that ensure termination of well-typed π-calculus processes. The systems are obtai...
Yuxin Deng, Davide Sangiorgi
196
Voted
WISES
2003
15 years 7 months ago
A Simulation Architecture for Time-Triggered Transducer Networks
— Steadily growing microcontroller capabilities at an ever decreasing cost per operation encourage the development of more extensive and smarter applications in the domain of emb...
Martin Schlager
ICCAD
2003
IEEE
158views Hardware» more  ICCAD 2003»
16 years 3 months ago
Approaching the Maximum Energy Saving on Embedded Systems with Multiple Voltages
Dynamic voltage scaling (DVS) is arguably the most effective energy reduction technique. The multiple-voltage DVS systems, which can operate only at pre-determined discrete voltag...
Shaoxiong Hua, Gang Qu