2452 search results - page 22 / 491 » On Reduction of Lagrange Systems |
ERSA
2009
14 years 7 months ago
2009
- The FPGA (re)configuration is a time-consuming process and a bottleneck in FPGA-based Run-Time Reconfigurable (RTR) systems. In this paper, we present a High Level Synthesis (HLS...
RTAS
2006
IEEE
15 years 3 months ago
2006
IEEE
Despite a rapid decrease in the price of solid state memory devices, system memory is still a very precious resource in embedded systems. The use of shared libraries is known to b...
AIPS
2003
14 years 11 months ago
2003
Symmetries are inherent in systems that consist of several interchangeable objects or components. When reasoning about such systems, big computational savings can be obtained if t...
ETS
2007
IEEE
15 years 4 months ago
2007
IEEE
This paper summarizes advanced test patterns designed to target dynamic and time-related faults caused by new defect mechanisms in deep-submicron memory technologies. Such tests a...
TWC
2010
14 years 4 months ago
2010
In this paper, a reduced-complexity partial transmit sequences (PTS) scheme is proposed to resolve the intrinsic high peak-to-average power ratio (PAPR) problem of orthogonal frequ...