149 search results - page 23 / 30 » On Signal Processing Methods for MIMO Relay Architectures |
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ANCS
2010
ACM
14 years 7 months ago
2010
ACM
As we move forward towards the next generation of wireless protocols, the push for a better radio physical layer is ever increasing. Conventional radio architectures are limited t...
DATE
2010
IEEE
15 years 2 months ago
2010
IEEE
—Time-dependent performance degradation due to transistor aging caused by mechanisms such as Negative Bias Temperature Instability (NBTI) and Hot Carrier Injection (HCI) is one o...
VLSISP
2010
14 years 8 months ago
2010
Abstract Polyphase channelizer is an important component of subband adaptive filtering systems. This paper presents an energy-efficient hardware architecture and VLSI implementatio...
ICASSP
2008
IEEE
15 years 4 months ago
2008
IEEE
Multiple memory banks design is employed in many high performance DSP processors. This architectural feature supports higher memory bandwidth by allowing multiple data memory acce...
58
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ISCAS
2007
IEEE
15 years 3 months ago
2007
IEEE
—This paper presents a DAC architecture built on parallel current-steering sub-DAC entities. Two main novelties are explored: flexibility and smartness. Firstly, a number of avai...