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» On Timing Analysis of Combinational Circuits
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ESORICS
2006
Springer
15 years 1 months ago
Timing-Sensitive Information Flow Analysis for Synchronous Systems
Timing side channels are a serious threat to the security of cryptographic algorithms. This paper presents a novel method for the timing-sensitive analysis of information flow in s...
Boris Köpf, David A. Basin
DATE
2007
IEEE
102views Hardware» more  DATE 2007»
15 years 4 months ago
Accurate and scalable reliability analysis of logic circuits
Reliability of logic circuits is emerging as an important concern that may limit the benefits of continued scaling of process technology and the emergence of future technology al...
Mihir R. Choudhury, Kartik Mohanram
DAC
2004
ACM
15 years 10 months ago
Worst-case circuit delay taking into account power supply variations
Current Static Timing Analysis (STA) techniques allow one to verify the timing of a circuit at different process corners which only consider cases where all the supplies are low o...
Dionysios Kouroussis, Rubil Ahmadi, Farid N. Najm
CDC
2010
IEEE
165views Control Systems» more  CDC 2010»
14 years 4 months ago
The behavior of linear time invariant RLC circuits
It is shown that just as we did for a purely resistive network [10], that circuit analysis is very simple if the elements are described not by potentials across and currents throug...
Erik I. Verriest, Jan C. Willems
FLOPS
2010
Springer
15 years 2 months ago
Tag-Free Combinators for Binding-Time Polymorphic Program Generation
Abstract. Binding-time polymorphism enables a highly flexible bindingtime analysis for offline partial evaluation. This work provides the tools to translate this flexibility into...
Peter Thiemann, Martin Sulzmann