1529 search results - page 26 / 306 » On Timing Analysis of Combinational Circuits |
DAC
2009
ACM
16 years 2 months ago
2009
ACM
Circuit reliability is affected by various fabrication-time and run-time effects. Fabrication-induced process variation has significant impact on circuit performance and reliabilit...
121
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MICRO
2003
IEEE
15 years 7 months ago
2003
IEEE
With increasing clock frequencies and silicon integration, power aware computing has become a critical concern in the design of embedded processors and systems-on-chip. One of the...
101
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DAC
1999
ACM
15 years 6 months ago
1999
ACM
In this survey paper we describethe combination of: discretized integral formulations, sparsication techniques, and krylov-subspace based model-order reduction that has led to rob...
ICCAD
1996
IEEE
15 years 6 months ago
1996
IEEE
We describe an algorithm for the synthesis and optimization of interface circuits for embedded system components such as microprocessors, memory ASIC, and network subsystems with ...
107
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JOLPE
2010
15 years 11 days ago
2010
This paper presents a low-power soft error-hardened latch suitable for reliable circuit operation. The proposed circuit uses redundant feedback loop to protect latch against soft e...