1529 search results - page 30 / 306 » On Timing Analysis of Combinational Circuits |
ISLPED
2004
ACM
15 years 3 months ago
2004
ACM
Modeling and estimation of switching activities remain to be important problems in low-power design and fault analysis. A probabilistic Bayesian Network based switching model can ...
101
click to vote
TVLSI
2010
14 years 4 months ago
2010
Abstract-- The operational characteristics of integrated circuits based on nanoscale semiconductor technology are expected to be increasingly affected by variations in the manufact...
RTCSA
2005
IEEE
15 years 3 months ago
2005
IEEE
We propose a new architecture for a content protection system that conceals confidential data and algorithms in an FPGA as electrical circuits. This architecture is designed for a...
68
Voted
IPPS
2010
IEEE
14 years 7 months ago
2010
IEEE
This paper focuses on parallelization of the classic static timing analysis (STA) algorithm for verifying timing characteristics of digital integrated circuits. Given ever-increasi...
ISQED
2007
IEEE
15 years 4 months ago
2007
IEEE
In nanometer regime, the effects of variations are having an increasing impact on the delay and power characteristics of devices as well as the yield of the circuit. Statistical t...