1529 search results - page 39 / 306 » On Timing Analysis of Combinational Circuits |
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
—Accurate timing analysis is crucial for obtaining the optimal clock frequency, and for other design stages such as power analysis. Most methods for estimating propagation delay ...
54
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ICCAD
2004
IEEE
15 years 6 months ago
2004
IEEE
To ensure the power and signal integrity of modern VLSI circuits, it is crucial to analyze huge amount of nonlinear devices together with enormous interconnect and even substrate ...
DATE
2008
IEEE
15 years 4 months ago
2008
IEEE
As semiconductor manufacturing requires greater capital investments, the use of contract foundries has grown dramatically, increasing exposure to mask theft and unauthorized exces...
164
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ICDE
2007
IEEE
15 years 11 months ago
2007
IEEE
Effective buffer management is crucial for efficient inmemory and streaming XQuery processing. We propose a buffer management scheme which combines static and dynamic analysis to ...
VTC
2007
IEEE
15 years 4 months ago
2007
IEEE
— We propose a novel bit error ratio (BER) analysis technique for fast frequency hopping (FFH) assisted M-ary frequency shift keying (MFSK) using product combining (PC), when the...