1529 search results - page 42 / 306 » On Timing Analysis of Combinational Circuits |
FPL
2006
Springer
15 years 1 months ago
2006
Springer
A secure content distribution system is prototyped based on run-time partial reconfigurability of an FPGA. The system provides a robust content protection scheme for online conten...
ITC
2003
IEEE
15 years 3 months ago
2003
IEEE
A technique to derive test vectors that exercise the worstcase delay effects in a domino circuit in the presence of crosstalk is described. A model for characterizing the delay of...
TVLSI
1998
14 years 9 months ago
1998
— Wave-pipelining is a method of high-performance circuit design which implements pipelining in logic without the use of intermediate latches or registers. The combination of hig...
ICCAD
2006
IEEE
15 years 6 months ago
2006
IEEE
— Negative Bias Temperature Instability (NBTI) in PMOS transistors has become a significant reliability concern in present day digital circuit design. With continued scaling, th...
LREC
2010
14 years 11 months ago
2010
Most question-answering systems contain a classifier module which determines a question category, based on which each question is assigned an answer type. However, setting up synt...