1529 search results - page 52 / 306 » On Timing Analysis of Combinational Circuits |
DATE
2010
IEEE
15 years 2 months ago
2010
IEEE
—We present a new technique for statistical static timing analysis (SSTA) based on Markov chain Monte Carlo (MCMC), that allows fast and accurate estimation of the right-hand tai...
DAC
2006
ACM
15 years 1 months ago
2006
ACM
Statistical static timing analysis (SSTA) has been a popular research topic in recent years. A fundamental issue with applying SSTA in practice today is the lack of reliable and e...
ICCAD
2008
IEEE
15 years 6 months ago
2008
IEEE
Statistical static timing analysis (SSTA) has emerged as an essential tool for nanoscale designs. Monte Carlo methods are universally employed to validate the accuracy of the appr...
DAC
2009
ACM
15 years 4 months ago
2009
ACM
Manufacturing process variability impacts the performance of synchronous logic circuits by means of its effect on both clock network and functional block delays. Typically, varia...
ICCAD
2005
IEEE
15 years 6 months ago
2005
IEEE
— Process variations cause significant timing uncertainty and yield degradation in deep sub-micron technologies. A solution to counter timing uncertainty is post-silicon clock t...