1529 search results - page 56 / 306 » On Timing Analysis of Combinational Circuits |
DAC
2003
ACM
15 years 10 months ago
2003
ACM
With the scaling of technology, power grid noise is becoming increasingly significant for circuit performance. A typical power grid circuit contains millions of linear elements, m...
ICCD
2004
IEEE
15 years 6 months ago
2004
IEEE
Deterministic gate delay models have been widely used to find the transition probabilities at the nodes of a circuit for calculating the power dissipation. However, with progress...
FPL
2001
Springer
15 years 2 months ago
2001
Springer
Designers of safety-critical VLSI systems are asking for effective tools for evaluating and validating their designs. Fault Injection is commonly adopted for this task, and its eff...
DAC
2007
ACM
15 years 1 months ago
2007
ACM
Mixed Vt has been widely used to control leakage without affecting circuit performance. However, current approaches target the combinational circuits even though sequential elemen...
TCAD
1998
14 years 9 months ago
1998
Abstract—This paper presents an aggressive optimization technique targeting combinational logic circuits. Starting from an initial implementation mapped on a given technology lib...