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» On Timing Analysis of Combinational Circuits
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ISQED
2005
IEEE
133views Hardware» more  ISQED 2005»
15 years 3 months ago
Sensitivity-Based Gate Delay Propagation in Static Timing Analysis
This paper presents a methodology for accurate propagation of delay information through a gate for the purpose of static timing analysis (STA) in the presence of noise. Convention...
Shahin Nazarian, Massoud Pedram, Emre Tuncer, Tao ...
ICCAD
2009
IEEE
132views Hardware» more  ICCAD 2009»
14 years 7 months ago
DynaTune: Circuit-level optimization for timing speculation considering dynamic path behavior
Traditional circuit design focuses on optimizing the static critical paths no matter how infrequently these paths are exercised dynamically. Circuit optimization is then tuned to ...
Lu Wan, Deming Chen
ICCAD
2004
IEEE
180views Hardware» more  ICCAD 2004»
15 years 6 months ago
Physical placement driven by sequential timing analysis
Traditional timing-driven placement considers only combinational delays and does not take into account the potential of subsequent sequential optimization steps. As a result, the ...
Aaron P. Hurst, Philip Chong, Andreas Kuehlmann
IMECS
2007
14 years 11 months ago
Analysis of a Mixed-Signal Circuit in Hybrid Process Algebra ACPsrt
— ACPsrt hs is a hybrid process algebra obtained by extending a combination of two existing extensions of Algebra of Communicating Processes (ACP), namely the process algebra wit...
Ka L. Man, Michel P. Schellekens
ISQED
2009
IEEE
126views Hardware» more  ISQED 2009»
15 years 4 months ago
Robust differential asynchronous nanoelectronic circuits
Abstract — Nanoelectronic design faces unprecedented reliability challenges and must achieve noise immunity and delay insensitiveness in the presence of prevalent defects and sig...
Bao Liu