1529 search results - page 60 / 306 » On Timing Analysis of Combinational Circuits |
DAC
2006
ACM
15 years 10 months ago
2006
ACM
Pareto surfaces in the performance space determine the range of feasible performance values for a circuit topology in a given technology. We present a non-dominated sorting based ...
ENTCS
2008
14 years 9 months ago
2008
This paper gives an overview of results of the project "Beyond Timed Automata" carried out in the Collaborative Research Center AVACS (Automatic Verification and Analysi...
ISCAS
2005
IEEE
15 years 3 months ago
2005
IEEE
Abstract— This paper presents and evaluates a hybrid implementation of a low complexity algorithm for speech enhancement, the Adaptive Gain Equalizer (AGE). The AGE is a subband ...
SBCCI
2006
ACM
15 years 3 months ago
2006
ACM
This paper presents the design of asynchronous circuits on synchronous FPGAs and CPLDs. Different design styles have been investigated through the implementation of dual-rail full...
AHS
2006
IEEE
15 years 3 months ago
2006
IEEE
The paper presents a novel integrated system in which a number of image processing algorithm are embedded within a Genetic Algorithm (GA) based framework in order to provide an ad...